Files
SLWChipVerify/examples/github_cpu_validation/projects.json
2026-04-19 16:14:05 +08:00

33 lines
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[
{
"name": "ultraembedded_riscv_core",
"repo": "https://github.com/ultraembedded/riscv.git",
"stars": 1703,
"rtl_subdir": "core/riscv",
"top": "riscv_core",
"cycles": 12,
"period": 10,
"reset_cycles": 2
},
{
"name": "zipcpu",
"repo": "https://github.com/ZipCPU/zipcpu.git",
"stars": 1535,
"rtl_subdir": "rtl",
"top": "zipcore",
"cycles": 12,
"period": 10,
"reset_cycles": 2
},
{
"name": "e203_cpu_top_fullrtl",
"repo": "https://github.com/riscv-mcu/e203_hbirdv2.git",
"stars": 1811,
"rtl_subdir": "rtl",
"top": "e203_cpu_top",
"cycles": 8,
"period": 10,
"reset_cycles": 2
}
]